U.S. Pat. No. 5,972,738 is for a PBGA Stiffener Package which includes a stiffener ring and a stiffener fixture. The stiffener ring and PBGA member are essentially coplanar to less than 8 mils and a top plate is placed on top of the PBGA member and the ring and member are secured together tightly.
U.S. Pat. No. 6,475,327 for attachment of a stiff heat spreader for fabricating a cavity down plastic chip carrier where there is a stiff heat spreader element and first and second bonding sheets are used and the second sheet is used to bond a circuit substrate and the stiff heat spreader element.
U.S. Pat. No. 6,020,221 is for a process for manufacturing a semiconductor device having a stiffener member which is attachable to the substrate.
U.S. Pat. No. 6,410,988 is for a thermally enhanced and mechanically balanced flip chip package and method of forming where a thermally conductive member is used in an attempt to maintain flatness over a wide temperature range.
U.S. Pat. No. 6,288,900 is for a warpage compensating heat spreader where a cap is provided for a stiffness characteristic that differs as it extends into different regions of the module.
U.S. Pat. No. 5,843,808 is for a structure and method for automated assembly of a tab grid array package where a metal strip stiffener is used in the production of a PBGA package assembly.
U.S. Pat. No. 6,501,171 is for a flip chip package with improved cap design and process for making same where a heat spreading perforated cap is used with adhesive fills the perforations to prevent delamination or warpage.
U.S. Pat. No. 6,639,304 is for a ball grid array module where a metal stiffener is used to provide lateral shielding for the HF applications.
U.S. Pat. No. 6,829,149 is for placement of sacrificial solder balls underneath the PBGA substrate where the layers of the laminate are arranged according to the stiffness of each layer.
U.S. Pat. Nos. 6,214,650 and 6,459,164 are for sealing a ball grid array package and circuit card interconnection where a BGA is surface mounted to a printed wiring board using solder balls and tubing is placed along the perimeter of the BFGA housing to prevent subsequently applied sealant from contacting the solder balls.
Many plastic ball grid arrays (PBGAs) have a coefficient of thermal expansion (CTE) that results in high levels of solder joint strain resulting in premature failure in DoD field environments. The CTE of the PBGA maybe significantly different from that of the printed wiring board to which it is soldered. One technique of improving solder joint reliability for ceramic ball grid arrays has been to replace the solder balls with high melt solder columns. This has not been accomplished with PBGAs. One potential reason is the warpage of the PBGA substrate during the column attach process or the assembly process, both of which affects the alignment of the columns.
Other techniques attempted include underfill (reworkability issues and limited success) and low expansion PWBs (Global solution). The later solution may cause issues with other high expansion components, add cost and other manufacturing difficulties.